Physical Design Engineer
Nawork
Mountain View, CA · Posted October 15, 2026
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November 2026
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About the job
A NauWork client is seeking a Physical Design Engineer to join their team. The position can be in-office, hybrid, or fully remote .
This well-funded startup is at the forefront of high-performance networking for AI and accelerated computing, developing breakthrough silicon to address critical I/O bottlenecks and enable unprecedented scale in data centers. Their team of industry veterans from Google, Broadcom, Meta, and other top-tier enterprises, is driving the next era of distributed computing infrastructure.
KEY RESPONSIBILITIES
Build and support the CAD tool flow for physical implementation in a cloud-first development environment.
Work with architects and microarchitects on the chip-level floorplan and block partitioning. Evaluate tradeoffs in functional partitioning, block size, and interface complexity with other stakeholders.
Define and construct the major physical structures, including the clock and reset architecture, the power delivery network, and interconnect topologies.
Execute on block-level, cluster-level, and top-level physical implementation, from synthesis, floorplan and power plan, through P+R, through timing closure, physical verification, and tapeout.
Interface with foundry and library partners on 3rd party IP and process technology issues, including updates to device models, IP integration requirements, and pre-tapeout signoff.
QUALIFICATIONS
Proven industry experience and successful track record in the physical implementation of large, high-performance network switching/routing fabrics (Ethernet, Infiniband, HPC), Network Interface Controllers, Smart-NICs, CPUs, or GPUs in the latest silicon process nodes.
Deep experience with the latest CAD tools through the entire physical design workflow, e.g., Cadence Genus and Innovus, Synopsys ICC2/FusionCompiler, Tempus, PrimeTime SI, PrimeTime PX, StarRC, ICV, Calibre.
Strong familiarity with various analysis tools such as Redhawk, Voltus.
Experience with circuit analysis using HSPICE is a plus.
Expert knowledge of SystemVerilog, as well as Perl, Python or other scripting languages.
To Learn More:
503-388-9585
833-NAU-WORK
careers.nauwork.com
Category: Engineering - Electrical (Semiconductor)
Position: Physical Design Engineer
Location: In-office, Hybrid, or Remote
Job Type: Direct-Hire, Full-Time