AI use among electronics engineers, except computer is little observed so far. Measured exposure for electronics engineers, except computer: 10% (little observed).

Share of this job’s tasks that AI is already used for at work, from real usage. It is not a forecast of job loss, and a low number means no use seen yet. Source: Anthropic Economic Index.

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Intel has filed 9 layoff notices in the last twelve months, covering 222 workers, most recently October 2026. These are public filings with state labor departments, and an open role can sit alongside them. See the filings

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About the job

Job Details:

Job Description:

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Want to learn more? Visit our YouTube Channel or the link below.

Life at Intel

In this role you will be responsible for enabling EDA vendor tools for RC Extraction (StarRC, Quantus, xACT, etc), and EM tools for high-frequency analysis on Intel's process technologies. Candidate will work with technology specification owners and validation teams in a coordinated fashion to ensure a high-quality solution. Interaction with EDA vendors is expected for new feature enablement.

Intel Foundry Business Group focuses on providing world-class manufacturing capabilities, innovative process technologies, and customized solutions to our global customers. As part of the Intel Foundry organization, you will join a team dedicated to enabling customers' success by bringing their ideas to life through advanced semiconductor solutions. Together, we support Intel's broader mission of creating world-changing technology that improves lives everywhere.

Well qualified candidates should possess the following behavioral traits:

Excellent communication and presentation skills for technical and non-technical audiences

High motivation and enthusiasm for self-directed, hands-on work

Creativity and flexibility to thrive under changing priorities and evolving program needs

Strong analytical thinking and problem-solving capabilities

Collaborative mindset with ability to work effectively across diverse teams

Adaptability to work in a fast-paced, innovative environment

You will be working at the intersection of cutting-edge semiconductor technology development and creating solutions that push the boundaries of what's possible in computing.

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

Candidate must possess BS degree with 4+ years of relevant experience, or MS degree with 3+ years of experience or PhD degree in EE/ECE or related field.

2+ years of experience in one of the following two skill sets:

Skill set 1:

RC extraction flow enablement such as StarRC or Quantus or SMNS-xACT

Scripting in Perl, or Python or TCL

Skill Set 2:

Interconnect Stack development for EDA tools such as ITF, ICT, MIPT, EM stack (Keysight-momentum) or equivalent.

Scripting in Perl, or Python or TCL

Preferred Qualifications:

2+ years of experience in the following:

DRC/LVS runset development or validation such as Calibre, Pegasus or ICV.

Customer Support and debugging in RC extraction.

High frequency tools such as Keysight-momentum, Ansys, Cadence-EMX.

Experience with JIRA, GIT.

Proficiency with CMOS process technology.

Desired experience:

Electromagnetic (EM) modeling and simulation tools and their application to signal integrity/crosstalk analysis for high-speed/high-density on chip/on package interconnect.

Working with EDA tool vendors to enable customized solutions.

Compensation varies depending on number of matching skills, geographical location, and years of experience.

Benefits at Intel

Our total rewards package goes above and beyond just a paycheck. Whether you're looking to build your career, improve your health, or protect your wealth, we offer generous benefits to help you achieve your goals. Go to Intel Benefits | Intel Careers for details of benefits available to you. Intel reserves the right to modify, change or discontinue benefit plans at any time in its sole discretion.

Job Type: Experienced Hire

Shift: Shift 1 (United States of America)

Primary Location: US, Texas, Austin

Additional Locations: US, California, Folsom, US, California, Santa Clara, US, Oregon, Hillsboro

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel .

Annual Salary Range for jobs which could be performed in the US: $128,880.00-245,160.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.