Firmware Engineer Tech Lead
Astera Labs
Listing collected from Astera Labs's career site. NextChapter is independent of Astera Labs.
San Jose, CA · Posted July 16, 2026
Just laid off? Start here: a plan for the first weeks
See every open role at Astera Labs
More in California job market · Technology & Software · Engineering jobs
More roles at Astera Labs
- Principal Mixed Analog Design Engineer · Irvine, CA
- Tech Lead Engineer, Design Verification · San Jose, CA
- Director Post-Si Electrical Validation Engineering · San Jose, CA
- STA Physical Design Engineer, Senior Principal · San Jose, CA
- Senior Principal Sourcing Manager – Capital Equipment · San Jose, CA
- Principal Electrical Design Engineer · San Jose, CA
Similar jobs
- Staff Business Systems Analyst– Salesforce Developer · Formfactor · Livermore, CA
- Sr. Quality Engineer - Post-Market Vigilance - Onsite · Medtronic · Irvine, CA
- Lead Site Reliability Engineer, Platforms · Zoom · San Jose, CA
- Senior Backend Engineer, Agent Infrastructure · Airbyte · San Francisco, CA
- Senior Site Reliability Engineer · Airbyte · San Francisco, CA
- Senior Backend Engineer, Video Platform Integration · Patreon · San Francisco, CA
Where San Jose, CA ranks
Where San Jose, CA placed in our monthly rankings, month by month. Each month stays online at its own address.
November 2026
- #1Best cities for marketing pay after cost of living$204k · of 16
- #1Best cities for aerospace and defense pay after cost of living$187k · of 19
- #2Best cities for security pay after cost of living$220k · of 10
- #3Best cities for technology pay after cost of living$205k · of 80
- #5Best cities for technology jobs1,449 openings · of 100
- #5Cities with the most jobs that do not need a four-year degree in the West Coast162 jobs · of 47
Rankings about engineering jobs
- Best cities for software and engineering jobs #1 San Francisco (3,412 openings)
- Best cities for engineering pay after cost of living #1 San Mateo ($216k)
- Most requested AI skills in engineering jobs #1 AI tools in daily work (6.1%)
- AI tools named most often in engineering jobs #1 Claude (1.7%)
- Employers with the most engineering jobs #1 Amazon (2,992 roles)
Skills this job asks for
Say which you have and which you want to build. We use it to match you to jobs like this one.
About the job
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com .
Role Overview
The mission of this role is to architect and develop firmware and microcontroller subsystems for Astera Labs’ SoC and systems products. As a Firmware Engineer Tech Lead you are responsible for implementing the major differentiating features of Astera Labs’ products. As such, firmware is considered equally important to the hardware, and the firmware team is often customer-facing accordingly to ensure the needs of the customer are fully comprehended.
Basic Qualifications
Strong academic and technical background in electrical engineering. At a minimum, a Bachelor’s in EE or Computer Science is required, and a Master’s is preferred.
Minimum 5 years’ experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
Experience developing firmware to execute in on-chip microcontrollers as well as C-language software development kits (SDKs) to execute on system management controllers (e.g. BMC).
Experience working with logic designers to architect and verify HW-SW interfaces on complex SoCs.
Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer meetings in advance, and to work with minimal guidance and supervision.
Entrepreneurial, open-minded behavior and can-do attitude. Think and act fast with the customer in mind!
Authorized to work in the US and start immediately.
Required Experience
Experience working on PCIe-Express (Gen-3 and above) protocol, including working with analyzers and exercisers to debug protocol issues.
High level of proficiency in C (preferred) or C++, including development of C-based SDKs.
High level of proficiency in Python for automating pre-processors/post-processors and FW QC.
Working knowledge of software/firmware build environments, gcc/Make, Doxygen, and GitHub.
Familiarity with SoC interfaces to common IP blocks such as PCIe Controllers, DDR Controllers, NVME Controllers, AMBA/AHB interfaces, on-chip memory interfaces, and other similar interfaces.
Preferred Experience
Experience with PAM4 SerDes with working knowledge of Tx/Rx equalization, adaptation, CDR and SerDes link budgets.
Hands-on experience with PCIe devices in Server, Storage, and/or Networking equipment.
Experience developing embedded firmware for PCIe or Ethernet Switch products.
Base salary range is $160,000 to $200,000 depending on experience, level, and business need. This role is eligible for discretionary bonus, incentives and benefits.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.